v101
分类号           
UDC
密奥迪美国  级
学  号
 
硕士学位论文
            功率MOSFET新结构及其工艺研究 
   
                              孙  丞               
学 科 名 称：  微电子学与固体电子学
学 科 门 类：          工  学       
指 导 教 师：      王彩琳    副教授   
申 请 日 期：          2009-01     

论文题目：功率MOSFET新结构及其工艺研究
学科专业：微电子学与固体电子学
研大众凌渡2022款图片及报价 究 生：孙丞
指导教师：王彩琳    副教授
           
摘    要
功率MOSFET具有输入阻抗高、开关速度快、安全工作区宽以及热稳定性好等特点，广泛地应用于开关电源等领域。
本文较系统地分析了功率MOSFET的结构、特性以及制造工艺。利用ISE软件重点分析了VDMOS的各项特性和关键工艺，给出了关键结构参数的设计方法，模拟分析了高温对器件特性以及关键特性参数的影响。提出了一种新的沟槽-平面栅功率MOSFET结构(TPMOS)，分析模拟了新结构的各项特性以及关键工艺。主要研究内容如下：
    第一，研究了VDMOS的各项特性。结果表明，VDMOS结构中，高耐压要求VDMOS具有低浓度、较厚的漂移区，较短的栅极长度，但是随着漂移区厚度的增加和浓度的降低，以及栅极长度的减小，漂移区电阻和JFET区电阻会增大，导致器件的导通电阻增大，通态功耗增大。因此，VDMOS的导通电阻与击穿电压之间形成不可调和的矛盾。
    第二，分析了高温对VDMOS特性及其关键特性参数的影响。结果表明，在硅器件的极限工作温度 (420K)范围内，随着温度的升高，VDMOS会出现阈值电压减小，栅控能力下降及安全工作区缩小等影响。奇瑞qq3配件提出了改善VDMOS高温特性的方法，给出600V VDMOS优化的关键结构参数。
第三，提出了一种新的沟槽-平面栅TPMOS结构，对TPMOS结构特性进行了分析模拟，并与VDMOS结构进行了比较。结果表明，沟槽的引入消除了元胞间距对VDMOS击穿电压和导通电阻的影响，使TPMOS有更好的阻断特性和导通特性。
第四，模拟了TPMOS新结构的制作工艺。模拟分析了p基区、n+源区及外延层之间的相互影响。根据模拟结果，对TPMOS器件的各项特性进行了验证，提取了相关工艺参数，确定了TPMOS的工艺实施方案。
鄂尔多斯豪车
该研究成果对进一步研究和开发功率MOSFET器件有一定参考价值。
关键词：电力半导体器件；功率MOSFET；优化设计；沟槽；工艺模拟

Title:
Major: Microelectronics and Solid-State Electronics
Name: Cheng SUN
Supervisor: Associate Prof. Cailin WANG
Abstractmini轿车
The power MOSFET has good performance in input independence, switching speed, safe operating area and thermal stability, so it’s widly used in switchd-model power converters and so forth.
The structure, principle, characteristics and fabrication process are analyzed systemically in this thesis. The characteristics and key processes of VDMOS are simulated using ISE-TCAD simulator, and the design methods of key parameters are also given. And a trench-planar MOSFET(TPMOS) is presented. The characteristics and key process of the new structure are analyzed. The main content is as follows:
Firstly, the characteristics of VDMOS are simulated. The results show that the breakdown voltage required a thick and low-doping epitaxital layer and a smaller length of gate, but it will increase the on-resistance of the JFET and the epitaxital layer. This is a conflict between the breakdown voltage and the on-resistance.
Secondly, the influence of the high temperature on the characteristics and the critical parameters are analysed and simulated. The results show that with the temperature increasing, there are some problems such as that the threshold decrease, the SOA reduce. The methods to improve the high-temperture of VDMOS is presented. The critical parameters of 600V VDMOS which has been optimized are given.
Thirdly, a trench-planar MOSFET(TPMOS) is presented, and the characteristics are analyzed and compared with conventional VDMOS. The results show that the influence of the cell distance on the breakdown voltage and on-resistance is eliminated by the trench structure. TPMOS has a better blocking characteristics and conducting characteristics.
Finally, the fabrication precess of TPMOS is simulated. The process of p-base, n+ source regions are simulated. Based on the results, the characteristics of TPMOS are validated. The related process parameters are gained. The fabrication scheme of TPMOS are comfirmed.